Update: Logic Design in EGR 204 Lab

My EGR 204 Microprocessor and Digital Logic class has just finished the hardware design and construction phase of their first project. These were rather standard projects, such as a simple circuit that adds small whole numbers or a circuit that takes a binary-coded decimal number as an input signal and then drives a seven-segment display to show the number in human-readable form. The students have also finished their first drafts of the lab reports. Here is a schematic of one student’s project:

Schematic of a 7-segment display driver

Many of these freshman students would not have guessed that after only 8 weeks of study in this class, they would be able to design at this level of complexity. (A previous blog entry regarding this class can be found here.)

1 Responses to “Update: Logic Design in EGR 204 Lab”


  1. No Comments

Leave a Reply

*
To prove you're a person (not a spam script), type the security word shown in the picture.
Anti-Spam Image